Experts from multidisciplinary fields in a dedicated single-track setting problem solving the future of interconnects and electro-optical packaging:
C. Thomas Gray received the B.S. degree in computer science and mathematics from Mississippi College, Clinton, MS and the M.S. and Ph.D. degrees in computer engineering from North Carolina State University, Raleigh, NC. From 1993 to 1998, he was an Advisory Engineer with IBM, Research Triangle Park, NC working on transceiver design for co
C. Thomas Gray received the B.S. degree in computer science and mathematics from Mississippi College, Clinton, MS and the M.S. and Ph.D. degrees in computer engineering from North Carolina State University, Raleigh, NC. From 1993 to 1998, he was an Advisory Engineer with IBM, Research Triangle Park, NC working on transceiver design for communication systems. From 1998 to 2004, he was a Senior Staff Design Engineer with the Analog/Mixed Signal Design Group, Cadence Design Systems, working on SerDes system architecture. From 2004 to 2010, he was a Consultant Design Engineer with Artisan/ARM and Technical Lead of SerDes architecture and design. In 2010, he joined Nethra Imaging as a System Architect. His work experience includes digital signal processing design and CMOS implementation of DSP blocks as well as high-speed serial link communication systems, architectures, and implementation. In 2011, he joined NVIDIA, Inc., Durham, NC where he is currently Senior Director of Circuit Research leading activities related to high-speed electrical signaling, photonics, security circuits, low-energy and resilient memories, circuits for machine learning, variation-tolerant clocking, and power delivery.
Ram Huggahalli is a Principal Hardware Engineer at Microsoft and leads the Platform and Physical Technologies team in enabling new technologies for future AI and General-Purpose compute platforms. Among the various exciting projects, his team is evaluating optical interconnect technologies for AI Scale-up communication and memory disaggre
Ram Huggahalli is a Principal Hardware Engineer at Microsoft and leads the Platform and Physical Technologies team in enabling new technologies for future AI and General-Purpose compute platforms. Among the various exciting projects, his team is evaluating optical interconnect technologies for AI Scale-up communication and memory disaggregation use cases. Ram has previously contributed to Microsoft's Cobalt 100 and Cobalt 200 processors as an IO and platform architect. Prior to Microsoft, Ram was the lead performance architect for Intel's large-scale HPC interconnect products. Ram has over 20 patents and graduated with an MS in Electrical Engineering and Engineering Management at the University of Missouri.
Di Liang is a Professor of Electrical and Computer Engineering at the University of Michigan, Ann Arbor. Prior to joining academia, he served as a Director at Alibaba Cloud Computing (US) to lead the development of silicon photonic 100G/lane DR4/DR8 transceiver product in 2021-2023. From 2009 to 2021, he was a research scientist at Hewlet
Di Liang is a Professor of Electrical and Computer Engineering at the University of Michigan, Ann Arbor. Prior to joining academia, he served as a Director at Alibaba Cloud Computing (US) to lead the development of silicon photonic 100G/lane DR4/DR8 transceiver product in 2021-2023. From 2009 to 2021, he was a research scientist at Hewlett Packard Labs and led advanced research in heterogeneous integrated photonics for energy-efficient optical interconnects in high-performance computing systems. He has (co-)authored one edited book, seven book chapters, over 360 journal and conference publications, and over 10,000 citations. He holds more than 70 issued patents, with several dozen pending. He is a Fellow of the IEEE and Optica.
Conference Co-Chair
Cisco
Conference Co-Chair
Colorado State University
Conference Co-Chair
UCSB
Technical Program Co-Chair
Ghiasi Quantum
Technical Program Co-Chair
Nvidia
Technical Program Co-Chair
BroadPak
Technical Program Co-Chair
IBM
Technical Program Co-Chair
Georgia Tech
Workshop Co-Chair
GlobalFoundries
